Communication Dans Un Congrès Année : 2023

Analysis and design of an innovative 19.5 GHz active phase shifter architecture, implemented in a 0.13 µm BiCMOS SiGe :C process, for beamforming in 5G applications

Résumé

This work presents the circuit design and implementation of a 19.5 GHz active phase shifter for beamforming in 5G applications. The proposed circuit is based on an original architecture using an injection-locked voltage-controlled oscillator (ILVCO) associated with a polyphase filter followed by a phase selection circuit and its sign. From a 1.3 V supply voltage, the proposed circuit is designed to obtain a phase shift in the range of 360°. This phase shifter is synthesised using the phase selection circuit (PS) for coarse adjustment in the steps of 90° and the injection-locked VCO for a fine-tuning adjustment between ±45°. Post layout simulation results obtained described the performance of the circuit for beamforming in 5G applications. The circuit consumed a total current of 19.4 mA with a chip size of 1.58 mm 2 including the pads and it is integrated in a BiCMOS SiGe:C 0.13 μm process.
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Dates et versions

hal-04796102 , version 1 (06-01-2025)

Identifiants

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Nuraddeen Ado Muhammad, David Cordeau, Jean-Marie Paillot. Analysis and design of an innovative 19.5 GHz active phase shifter architecture, implemented in a 0.13 µm BiCMOS SiGe :C process, for beamforming in 5G applications. IEEE International Conference on Design, Test and Technology of Integrated Systems, DTTIS 2023, Nov 2023, Gammarth, Tunisia. pp.1-6, ⟨10.1109/DTTIS59576.2023.10348212⟩. ⟨hal-04796102⟩
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