(Invited) Challenges and Opportunities in the Design of Tunnel FETs: Materials, Device Architectures, and Defects - CNRS - Centre national de la recherche scientifique Accéder directement au contenu
Article Dans Une Revue ECS Transactions Année : 2014

(Invited) Challenges and Opportunities in the Design of Tunnel FETs: Materials, Device Architectures, and Defects

Résumé

Tunnel FETs are perceived as promising emerging devices to improve the energy efficiency of CMOS integrated circuits. This paper presents results and discussions about some selected topics concerning the working principles and design options of Tunnel FETs, which we believe will play an important role in the development and optimization of these transistors in the near term future.
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hal-02065983 , version 1 (13-03-2019)

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D. Esseni, M. Pala, A. Revelant, P. Palestri, L. Selmi, et al.. (Invited) Challenges and Opportunities in the Design of Tunnel FETs: Materials, Device Architectures, and Defects. ECS Transactions, 2014, 64 (6), pp.581-595. ⟨10.1149/06406.0581ecst⟩. ⟨hal-02065983⟩
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