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Detecting Faults in Inner Product Masking Scheme IPM-FD: IPM with Fault DetectionJournal of Cryptographic Engineering, 2020, ⟨10.1007/s13389-020-00227-6⟩
Journal articles
hal-02915673v1
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Evaluation of Delays PUFs on CMOS 65 nm Technology: ASIC vs FPGAWorkshop on Trustworthy Manufacturing and Utilization of Secure Devices, TRUDEVICE 2013, May 2013, Avignon, France
Conference papers
ujm-00833893v1
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3D Hardware CanariesCHES 2012 - 14th International Workshop Cryptographic Hardware and Embedded Systems, Sep 2012, Leuven, Belgium. pp.1-22, ⟨10.1007/978-3-642-33027-8_1⟩
Conference papers
hal-01111533v1
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Practical Improvements of Side-Channel Attacks on AES: Feedback from the 2nd DPA ContestJournal of Cryptographic Engineering, 2014, 4 (4), pp.259-274. ⟨10.1007/s13389-014-0075-9⟩
Journal articles
hal-02286726v1
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Successful Attack on an FPGA-based WDDL DES Cryptoprocessor Without Place and Route Constraints.Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., Apr 2009, NICE, France. pp.640-645
Conference papers
hal-00325417v3
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Lambda-Min Decoding Algorithm of Regular and Irregular LDPC Codes3nd International Symposium on Turbo Codes and Related Topics, Sep 2003, Brest, France. pp.451-454
Conference papers
hal-00105245v1
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Low-Cost Countermeasure against RPACARDIS 2012, Nov 2012, Graz, Austria. pp.106-122
Conference papers
hal-00799421v1
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Design of High Speed AWGN Communication Channel EmulatorAnalog Integrated Circuits and Signal Processing, 2003, 34, N°2, p133-142
Journal articles
hal-00105234v1
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Generic description and synthesis of LDPC decoderIEEE Transactions on Communications, 2006
Journal articles
hal-00105435v1
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Area Optimization of Cryptographic Co-Processors Implemented in Dual-Rail with Precharge Positive LogicInternational Conference on Field Programmable Logic and Applications, Sep 2008, Heidelberg, Germany. pp.161-166, ⟨10.1109/FPL.2008.4629925⟩
Conference papers
hal-00320425v2
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Correlated Extra-Reductions Defeat Blinded Regular Exponentiation18th International Conference on Cryptographic Hardware and Embedded Systems (CHES 2016), Aug 2016, Santa Barbara, CA, United States. pp.3-22, ⟨10.1007/978-3-662-53140-2⟩
Conference papers
hal-03750287v1
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Vade Mecum on Side-Channels Attacks and Countermeasures for the Designer and the EvaluatorDesign & Technology of Integrated Systems, Apr 2011, Athens, Greece. pp.6, ⟨10.1109/DTIS.2011.5941419⟩
Conference papers
hal-00579020v2
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Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacksInformation Security, IET, 2011, 5 (4), pp.181-190. ⟨10.1049/iet-ifs.2010.0238⟩
Journal articles
hal-02286262v1
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Security Trends for FPGASB. Badrignans, J.L. Danger, V. Fischer, G. Gogniat, L. Torres. Springer, 282 p., 2011, 978-94-007-1337-6
Books
lirmm-00616973v1
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PFD - A Flexible Higher-Order Masking SchemeIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016, 36, pp.1327-1339. ⟨10.1109/tcad.2016.2629441⟩
Journal articles
hal-01629883v1
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Underneath the FPGA Clothes: Enhancing Security25th International Conference Field Programmable Logic and Applications, FPL 2015, Sep 2015, Londre, United Kingdom
Conference papers
hal-01279193v1
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Linear complementary dual code improvement to strengthen encoded circuit against hardware Trojan horsesIEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2015, May 2015, McLean, United States. ⟨10.1109/HST.2015.7140242⟩
Conference papers
hal-01240228v1
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Private Circuits II versus Fault Injection AttacksReconfig 2015, Dec 2015, Mayan Riviera, Mexico
Conference papers
hal-01240244v1
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Overview of Dual Rail with Precharge Logic Styles to Thwart Implementation-Level Attacks on Hardware Cryptoprocessors2009
Preprints, Working Papers, ...
hal-00431261v1
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Two-Metric Helper Data for Highly Robust and Secure Delay PUFs2019 IEEE 8th International Workshop on Advances in Sensors and Interfaces (IWASI), Jun 2019, Otranto, Italy. pp.184-188, ⟨10.1109/IWASI.2019.8791249⟩
Conference papers
hal-02302114v1
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Evaluation of Delay PUFs on CMOS 65 nm Technology: ASIC vs FPGAInternational Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices CryptArchi 2013, Jun 2013, Fréjus, France
Conference papers
ujm-00840962v1
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A synthesis of side-channel attacks on elliptic curve cryptography in smart-cardsJournal of Cryptographic Engineering, 2013, 3 (4), pp.241-265. ⟨10.1007/s13389-013-0062-6⟩
Journal articles
hal-00934333v1
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Optimizing Inner Product Masking Scheme by a Coding Theory ApproachIEEE Transactions on Information Forensics and Security, 2021, 16, pp.220-235. ⟨10.1109/TIFS.2020.3009609⟩
Journal articles
hal-03966523v1
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Foundations and practice of security : 6th international symposium, FPS 2013, La Rochelle, France, October 21-22, 2013, revised selected papersSpringer, 8352, pp.444, 2014, Lecture Notes in Computer Science, Lecture Notes in Computer Science, 978-3-319-05302-8
Books
hal-01264784v1
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Efficient FPGA Implementation of Gaussian Noise Generator for Communication Channel Emulation7th IEEE International Conference on Electronicsm Circuits & Systemes (ICECS'2K), Dec 2001, Kaslik, Lebanon. pp.1
Conference papers
hal-00347213v1
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The Big Picture of Delay-PUF Dependability24th European Conference on Circuit Theory and Design (ECCTD), IEEE, Sep 2020, Sofia, Bulgaria
Conference papers
hal-02932063v1
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Physically Unclonable Function: Principle, Design and Characterization of the Loop PUFTrusted Computing for Embedded Systems, SPRINGER, pp.115-133, 2015, ⟨10.1007/978-3-319-09420-5_6⟩
Book sections
hal-02287062v1
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Achieving side-channel high-order correlation immunity with leakage squeezingJCEN, 2014, ⟨10.1007/s13389-013-0067-1⟩
Journal articles
hal-02286851v1
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Security Evaluation Against Side-Channel Analysis at Compilation TimeSpringer. Algebra, Codes and Cryptology (A2C), pp.129-148, 2019, ⟨10.1007/978-3-030-36237-9_8⟩
Book sections
hal-02915643v1
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Hardware Trojan Horses in Cryptographic IP CoresFDTC (Fault Detection and Tolerance in Cryptography), Aug 2013, Santa Barbara, United States. pp.15-29, ⟨10.1109/FDTC.2013.15⟩
Conference papers
hal-00855146v2
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