Low Hysteresis Vanadium Dioxide Integrated on Silicon Using Complementary Metal‐Oxide Semiconductor Compatible Oxide Buffer Layer - Groupe de Recherche en Informatique, Image, Automatique et Instrumentation de Caen (GREYC)
Article Dans Une Revue Small Science Année : 2024

Low Hysteresis Vanadium Dioxide Integrated on Silicon Using Complementary Metal‐Oxide Semiconductor Compatible Oxide Buffer Layer

Résumé

VO 2 undergoes a metal‐insulator transition (MIT) at ≈70 °C, which induces large variations in its electrical and wavelength‐dependent optical properties. These features make VO 2 a highly sought‐after compound for optical, thermal, and neuromorphic applications. To foster the development of VO 2 ‐based devices for the microelectronic industry, it is also imperative to integrate VO 2 on silicon. However, high lattice mismatch and the formation of silicates at the interface between VO 2 and Si degrade the quality and functionality of VO 2 films. Moreover, VO 2 's polymorphic nature and stable VO phases pose integration issues. To address these challenges, the MIT of VO 2 thin films integrated on Si with a complementary metal‐oxide semiconductor‐compatible Hf x Zr 1− x O 2 (HZO) buffer layer is investigated. Using in situ high‐resolution X‐ray diffraction and synchrotron far‐infrared spectroscopy, combined with multiscale atomic and electronic structure characterizations, it is demonstrated that VO 2 on the HZO buffer layer exhibits an unusually low thermal hysteresis of ≈4 °C. In these results, the influence of strain on M2 phase nucleation, which controls the hysteresis, is unraveled. Notably, the rate of phase transition is symmetric and does not change for the heating and cooling cycles, implying no incorporation of defects during cycling, and highlighting the potential of an HZO buffer layer for reliable operation of VO 2 ‐based devices.
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hal-04761025 , version 1 (30-10-2024)

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Swayam Prakash Sahoo, Matthieu Bugnet, Ingrid Cañero Infante, Victor Pierron, Laurence Méchin, et al.. Low Hysteresis Vanadium Dioxide Integrated on Silicon Using Complementary Metal‐Oxide Semiconductor Compatible Oxide Buffer Layer. Small Science, 2024, ⟨10.1002/smsc.202400398⟩. ⟨hal-04761025⟩
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