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Conference Papers Year : 2020

Toward an Exact Simulation Interval for Multiprocessor Real-Time Systems Validation

Abstract

In order to study the schedulability of complex real-time systems, simulation can be used. Of course, to achieve formal validation of schedulability, simulations must be run long enough such that the schedule repeats. An upper bound on the length of the simulation that is valid for a very wide class of systems running on top of identical multiprocessor platforms is given in a previous work. It is known that this bound is pessimistic. In this paper, we derive a characterization of the exact bound for the same class of systems and describe an algorithm for its computation. We use it to quantify the pessimism of the upper bound on a set of synthesized systems. We also give some directions to explore the complexity vs. tightness trade-off for this problem.
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Dates and versions

hal-03006791 , version 1 (16-11-2020)

Identifiers

  • HAL Id : hal-03006791 , version 1

Cite

Joumana Lagha, Jean-Luc Béchennec, Sébastien Faucou, Olivier-H Roux. Toward an Exact Simulation Interval for Multiprocessor Real-Time Systems Validation. VALID 2020, The Twelfth International Conference on Advances in System Testing and Validation Lifecycle, Oct 2020, Lisbon, Portugal. ⟨hal-03006791⟩
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